The Forgetful CPU (Linux on M4)
A developer details the reverse-engineering steps and fixes required to boot Linux on an M4 Mac mini, including bypassing locked registers and fixing the WFI instruction bug.
read it Essential reading for systems engineers interested in the architectural hurdles and low-level workarounds involved in porting Linux to Apple Silicon.
summary
The author details their journey booting Linux on an M4 Mac mini, navigating new hardware security architectures like SPTM. Key hurdles included locked GXF and RVBAR registers, missing MMU page table mappings for early MMIO UART output, and an M4-specific WFI instruction quirk that unexpectedly zeroed CPU registers. These findings led to upstream kernel and m1n1 bootloader fixes, enabling stable multi-core Linux execution on M4 chips.
key points
- M4 Macs mandate SPTM and lock down raw boot registers like GXF and RVBAR, requiring specific conditional initialization bypasses in the m1n1 bootloader.
- Early kernel debugging failed because Linux lacks initial 1:1 MMU identity mappings for MMIO-based UART access.
- The WFI instruction on M4 violates the ARM64 specification by zeroing registers without a working chicken bit, requiring instruction patching and upstream kernel mitigations.
who should read it
Low-level kernel developers, systems programmers, and hardware enthusiasts interested in ARM architecture and Asahi Linux.
discussion positive
consensus
Commenters praise the impressive low-level reverse engineering work while lamenting Apple's vertical integration and lack of official hardware openness for alternative operating systems.
pushback
Some participants argue that investing effort into closed Apple hardware is counterproductive compared to supporting open RISC-V or standard x86 platforms.
TLDR: the WFI (wait for interrupt) instruction used to preserve registers but you could configure it to delete register values, saving power.
Since M4 it always deletes register values and the configuration is gone, which made Linux assume they were preserved, but they are not.
It provides a clear, concise explanation of the core technical puzzle regarding the WFI instruction change on M4 chips.
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