Reverse-engineering the Intel 8087's tangent algorithm: more than CORDIC
Ken Shirriff reverse-engineers the Intel 8087 floating-point chip's tangent instruction, revealing how it combines CORDIC with a Padé rational polynomial approximation.
read it Rich with die photographs, microcode listings, and algorithmic analysis, this deep dive rewards full attention from anyone interested in hardware internals.
summary
Ken Shirriff breaks down the microcode and circuitry behind the Intel 8087 coprocessor's FPTAN instruction by decapping the chip and analyzing its ROM. To compute tangents quickly and accurately to 64 bits, the chip merges a 16-step CORDIC algorithm with a Padé rational polynomial approximation for the residual angle. By returning the partial coordinates instead of performing a slow hardware division, the chip optimizes performance and simplifies execution. The post walks through the microcode implementation line by line to show how these mathematical methods map directly onto vintage silicon.
key points
- The 8087 achieves high performance by combining a 16-bit CORDIC algorithm with a Padé rational polynomial approximation for the residual angle.
- FPTAN returns a partial tangent (separate numerator and denominator) to avoid an expensive hardware division step.
- The chip's microcode handles distinct execution paths depending on the magnitude of the input argument's exponent.
who should read it
Hardware engineers, retrocomputing enthusiasts, and software developers interested in low-level numerical algorithms and vintage chip design.
discussion warm
consensus
Commenters universally praise the author's meticulous reverse-engineering work and express appreciation for the ingenuity of early silicon design.
Always thought it was strange that fptan also pushes 1 to the register stack. It now makes sense it’s so existing code for the 8087 which was expected to do y/x to get the actual tangent could keep working by doing y/1 on newer processors.
Explains why FPTAN pushes values to the register stack in a specific way, tying microcode design to legacy software expectations.
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