The Lost Atomic Update on Loongson CPU
Researchers discovered a hardware erratum in Loongson CPUs where vectorized memory reads cause relaxed atomic instructions to lose updates, which Loongson quickly fixed via an internal control bit.
read it This detailed postmortem of a subtle hardware bug and its AI-assisted investigation offers great technical depth into weak memory models and CPU errata.
summary
While packaging software for Debian on LoongArch, developers encountered an infinite loop caused by relaxed atomic instructions failing to increment shared counters. After months of dead ends, they used AI to pinpoint that glibc's vectorized memory copies (LASX xvld) triggered the lost updates on the LA664 core. The bug affected concurrent operations across physical cores and could corrupt reference counts in languages like Rust. Loongson provided a firmware fix within two weeks using an undocumented control register bit acting as a chicken bit with negligible performance impact.
key points
- Vectorized memory reads using LASX (such as glibc's memcpy) can cause relaxed atomic instructions like amadd and amcas to lose updates on Loongson LA664 cores when running across different physical cores.
- The bug can cause reference-counting corruption in software like Rust's std::sync::Arc, potentially leading to use-after-free memory safety issues.
- Loongson fixed the erratum within two weeks by utilizing an undocumented internal control register (MCSR24 bit 13) that acts as a chicken bit with minimal performance overhead.
who should read it
Systems programmers, hardware engineers, and developers interested in low-level debugging and CPU architecture.
discussion positive
consensus
Commenters quickly identified the undocumented control register fix as a classic hardware 'chicken bit' and shared historical context on similar debugging workarounds.
> The fix is to set bit 13 of MCSR24 to 1. MCSR24 is an internal CSR whose function is not described in the manual. After setting this bit, the lost update no longer occurs. Testing showed the performance loss is very small: single-core performance is unaffected, and multi-core performance drops only slightly.
Presumably this is a so-called “chicken bit”.
It correctly classifies the undocumented register fix as a hardware chicken bit, sparking a helpful subthread of explanations and historical links.
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